tinytechjobs
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Singapore,
SGP
This position deals with the design and development of embedded wafer level packaging, with emphasis on wafer level molding, wafer level RDL processes, flip-chip assembly and wafer thinning.
Responsibilities:
The key responsibilities will include wafer level package design, process/material selection, ultra-wafer thinning and wafer handling, as well as, process integration for embedded wafer level packaging and die embedding.
Requirements:
Requirements:
* PhD degree in Mechanical Engineering/Material Science with at least 3 years of related industrial/research experience
* Knowledge on packaging material selection and package reliability test methods
* Experience in project scoping and execution of the projects
* Excellent communication skills and teamwork with strong self-motivation
Application Info:
Our Rewards
As we believe in recruiting only the best, we offer successful candidates premier remuneration package and attractive benefits plans which include Annual Wage Supplement, Performance Bonuses, Medical & Life Insurance Plans and Relocation Benefits
We invite you to apply with your full resume, including current and expected salaries, relevant experience and contact number(s).
Posted: 2009-10-21 18:57:17
Singapore, SGP
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