tinytechjobs
-
Singapore,
SGP
Responsibilities :
* Develop and support automation programs (SKILL, OCEAN, Tcl) for front-end and back-end CAD flows (Spice and Verilog simulations, schematic capture, layout, etc)
* Develop, test, and integrate physical verification rule decks for DRC, LVS and LPE within Assura and Calibre
* Update existing Pcells t
* be Virtuos
* XL compatible
* Provide expert-level problem solving support for day t
* day front-end and back-end issues and PDK maintenance
* Implement analog customer layout and digital P & R layout with layout team
* Develop and implement a productive design methodology by collaborating with design team
* Support of Linux/Unix workstation based servers and clients, setting up OS, updates, disk/file management and user management
Requirements:
* PhD in Engineering with at least 5 years' experience providing support for full-custom front-end and back-end CAD flow in a semiconductor design group or equivalent
* Proficient in Linux/Unix environment
* Expert level experience with creating custom analog physical layouts within the Cadence Virtuos
* environment, and digital P & R physical layout within Cadence and Synopsys environment
* Experience with setting up shared and mirrored vaults, projects, as well as users accounts
* Experience with Verilog RTL, Mixed Signal Co-simulator, and other CAD tools
* Exposure t
* advanced CMOS process technologies
* Conversant in several of the following areas:
* Programming in SKILL, OCIEAN, Tcl, Perl
* Verilog, Assura and Calibre based DRC/VLS/LPE flow development
* Circuit simulation
Application Info:
Our Rewards
As we believe in recruiting only the best, we offer successful candidates premier remuneration package and attractive benefits plans which include Annual Wage Supplement, Performance Bonuses, Medical & Life Insurance Plans and Relocation Benefits
We invite you to apply with your full resume, including current and expected salaries, relevant experience and contact number(s).
Posted: 2009-12-17 09:55:29
Singapore, SGP
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